Course code 
02 40 6178 00 
Number of ECTS points 
4 
Course title in the language of instruction 
Digital Systems 
Course title in Polish 
Digital Systems (Układy cyfrowe) 
Course title in English 
Digital Systems 
Language of instruction 
English 
Form of classes 

Lecture 
Tutorials 
Laboratory 
Project 
Seminar 
Other 
Total of teaching hours during semester 
Contact hours 
30 
10 
15 


0 
55 
Elearning 
Yes 
Yes 
No 
No 
No 
No 

Assessment criteria (weightage) 
0.70 
0.00 
0.30 


0.00 


Unit running the course 
Instytut Elektroniki 
Course coordinator 
dr inż. Piotr Dębiec 
Course instructors 
dr inż. Piotr Dębiec, dr inż. Artur Klepaczko 
Prerequisites 
Basic knowledge of algebra, propositional calculus, and programming. 
Course learning outcomes 
 Skills in analyzing simple combinational and sequential circuits.
 Skills in designing simple, nonstandard combinational circuits.
 Skills in designing simple, synchronous finite state machine given the state transition diagram of the circuit.
 Skills in finding formal models of simple digital circuits given a description of its operation.

Programme learning outcomes 
 Basic knowledge in the field of mathematics, physics and engineering and technical sciences; detailed knowldege in the field of electronics and telecommunications including selected issues from electrical engineering, automation and technical information technology.
 Ability to use one's knowledge from the area of ??electrical circuits, analog and digital electronic circuits, microelectronics, microprocessor and computer systems as well as nontechnical aspects to design, build, commision and test an electronic system.

Programme content 
Boolean algebra, logic gates, design and minimization of combinational devices, decoders, adder, comparators, arithmeticlogic unit, flipflops and latches, triggering conditions, synthesis and analysis of simple synchronous sequential systems  counters, registers, controllers. Design of sequential system given a state transition diagram or on the basis of functional specifications. 
Assessment methods 
Learning outcomes 1, 2, 3, and 4: two written tests.
Learning outcome 1 and 3: short tests during laboratory sessions.

Grading policies 
Attendance in lab sessions, positive outcome of lab tests (at least 50% of points possible to obtain), positive grade received in the final written exam (at least 60% of points possible to obtain, including a bonus for homework). 
Course content 
LECTURE
1. Numeral systems: binary, octal, hexadecimal. Binary codes: Gray, '1 of n', two's complement (U2), signmagnitude, thermometric code, fixed and floating point representations of real numbers.
2. Boolean Algebra vs. propositional calculus, binary Boolean algebra, truth table, canonical forms, normal forms: conjunctive and disjunctive, minterms, maxterms.
3. Minimization of digital systems using Karnaugh maps and their realization with AND, OR, NOT gates.
4. Design and analysis of basic combinatorial circuits: XOR and XNOR gates, voting machine, priority encoder, decoders, 1bit half adder and 1bit full adder, multiplexers and demultiplexers.
5. Design and analysis of basic iterative combinatorial circuits: adder, U2 generator, subtractor, comparators, arithmeticlogic unit (ALU), BIN>Gray and GrayBIN decoders, multiplier, arithmeticlogic unit (ALU), lookahead carry generator, RAM memory 4x4, nonstandard functional blocks.
6. Realization of minimal combinatorial systems using: NAND+NOT gates, NOR+NOT gates, multiplexers, BIN>'1 of n' decoders. NAND, NOR, NOT gates implementations in CMOS technology.
7. Static and dynamic hazards; static hazard detection and elimination: analytically and with Karnaugh maps.
8. Latches and flipflops as 1bit memories: operation, triggering conditions. Descritpion of flipflops and latches: state transition table (STT), state transition equations (STEs), state transition diagram (STD), excitation table.
9. Analysis and design of synchronous sequential systems: registers, counters, controllers, sequence detectors and generators, frequency divisors, nonstandard systems, Moore machine vs. Mealy machine. Timings for different triggering conditions.
10. Synchronous iterative systems (serial circuits): adder, U2 generator, subtractor, comparators, nonstandard systems.
11. Introduction to programmable logic devices (SPLD, CPLD, FPGA) and VHDL hardware description language.
TUTORIALS
In tutorials students deepen their knowledge acquired during lectures by solving digital design and analysis problems.
LABORATORY
1. Logic gates and gate connections (2 hrs).
2. Combinatorial circuit design using NAND gates (2 hrs).
3. Applications of multiplexers (2 hrs).
4. Combinatorial iterative circuits (2 hrs).
5. Analysis of synchronous sequential circuits (2 hrs).
6. Analysis and synthesis of synchronous sequential circuits. Shift registers (2 hrs).
7. Introduction to microprocessor systems (2 hrs). 
Basic reference materials 
 Mano M. M., Ciletti M., Digital Design, 5th edition, Prentice Hall Inc., 2013.
 Burger P.: Digital Design. A Practical Course, John Willey & Sons, Inc., New York, 1988.
 Wilkinson B.: Digital System Design, Prentice Hall, 2003.
 Lecture and laboratory materials published on the web page: http://eletel.p.lodz.pl/pdebiec/ds/ (login: student_eit, pass: logika).
 Tyszer J., Mrugalski G., Pogiel A., Czysz D., "Technika cyfrowa. Zbiór zadań z rozwiązaniami.", Wydawnictwo BTC, 2010 (in Polish).

Other reference materials 
 Mano M.: Computer System Architecture, 3rd edition, Prentice Hall Inc., 1994.
 Tyszer J., Mrugalski G.: Układy cyfrowe : zbiór zadań z rozwiązaniami, Wydaw. Politechniki Poznańskiej, 2004 (in Polish).
 Źródła internetowe (Internet resources).

Average student workload outside classroom 
59 
Comments 

Updated on 
20200903 09:12:43 
Archival course yes/no 
no 